
Embedded and Smart Systems
VLSI
Connect device fundamentals, CMOS logic, Verilog HDL, synthesis, physical design, DFT, FPGA/ASIC methods and sign-off through one structured learning path.
Who it’s for
Electronics and electrical engineering learners interested in chip design.
Listed under these streams. We confirm any prerequisites with you before you register.
What you’ll study
- 01Device fundamentals and CMOS logic
- 02Verilog HDL
- 03Logic synthesis
- 04Physical design
- 05Design for testability (DFT)
- 06FPGA/ASIC methods and sign-off
The full session-by-session plan is in the domain brochure. Ask admissions and we will send it to you.
What you’ll build
Practice tasks
Short assignments after each block of sessions, from the first week onwards. Each one is reviewed, so you know exactly what to improve.
Your domain project
In weeks six and seven you take on a project that pulls the whole curriculum together. Briefs are set for each batch.
How it runs
- Duration
- Two months (8 weeks)
- Program fee
- ₹9,999₹14,999
- Learning platform
- Sloka Academy LMS, hosted on Teachmint
- Completion
- Certificate on meeting the program requirements
Batch dates, class timings and the internship arrangement for VLSI are shared by admissions when you get in touch.
Where it can lead
- VLSI Design Engineer (Trainee)
- Verification Engineer (Trainee)
- Physical Design Engineer (Trainee)
Examples of roles this domain relates to. The program does not guarantee a job or placement.
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Ready for VLSI?
Call or email admissions. We will confirm the next batch date, check the fit with your background and explain how pre-registration works.
